AMD Athlon XP and RDTSC

nobody wrote on Monday, December 06, 2004:

I haven’t actually used GLFW but looked into the source because I’m interested in high-res timers. It seems to me GLFW would choose rdtsc for an Athlon XP, I’ve had recent experiences suggesting thats a bad combination. I’ve also found this document (follow link and look at section 20) stating that the AMD misses to count a fair amount of instructions, i.e. mov, which I guess really messes up the counting. Is this somehow accounted for in GLFW?

I’d really like to know if anyone has any additional info on this problem, workarounds etc…

marcus256 wrote on Monday, December 06, 2004:

I am not 100% sure, but what the document states seems unrelated to how GLFW uses RDTSC. It seems to me that the performance counter is a separate counter that counts instructions, while the counter GLFW reads (TSC) is the processor cycle count, and thus unrelated to the actual number of executed instructions.

Could you please state your experiences/problems in more detail?

There are however issues with how GLFW 2.4.x detects support for variable CPU frequencies on modern INTEL CPU:s, which is another story that I hope to address with GLFW 2.5.